박막형 고주파 소자를 위한 저가형 3차원 웨이퍼 레벨 패키징의 설계와 제작

Abstract

This thesis presents the design and fabrication of simple and low-cost wafer level packaging(WLP) for thin film radio frequency(RF) devices. The WLP with a small size of was fabricated by low-cost micromachining process. The package wafer of key function in the WLP consisting of junction with the package wafer and device wafer contains cavity for securing a space of the located device, electrical feed-through for electrical connection, solder for bonding with device wafer, etc. Without high-cost silicon deep reactive etching(DRIE) and plating process for electrical through-interconnection, the proposed technique utilizes typical silicon anisotropic etching and metal deposition method. As the solder material for bonding and hermetic sealing, we used gold (Au)/tin(Sn) alloy. The fabricated WLP with a bonding size of showed an excellent average shear strength of and a low leak rate of less than . It also showed a very low insertion loss of at the operation frequency of 2GHz. The proposed WLP structure is simple and cost-effective, so we expect that the proposed WLP is one of good candidates for packages of thin-film-type RF devices.