PUKYONG

미세결함 검출용 초저전력 자동 이득 조절 증폭기 구현

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Alternative Title
The Realization of Ultra Low-Power Automatic Gain Control Amplifier for Micro Defect Detection
Abstract
Abstract
A Programmable Gain Amplifier(PGA) is an operational amplifier that allows the controller to adjust its transfer signals so as to provide larger or smaller voltage gain. In general, it is essential to maximize the range of dynamic output signals related to the given input signals in the analog systems.
This thesis presents the design of a new ultra low-power PGA to detect all types of micro inner defects in the process of producing steel plates. The proposed PGA consists of 3 stages such as the PGA core with active load, the feedback system, the common source amplifier, etc. To achieve low-power consumption and an accurate system, the PGA is based on using digital control CMOS switches and passive resistors at the first stage. The second stage also contains the feedback system to increase system ability. Moreover, the proposed PGA has fully symmetric scheme to reduce the input and power supply noises in the detected signal containing defects.
The proposed PGA is fabricated using a Magnachip/SK Hynix 0.18μm CMOS 1poly-6metal technology. Its performance is validated by simulation using Advanced Design System. According to our simulation results, the proposed PGA showed an excellent gain error of less than 0.12dB, a very small chip size of 0.015mm, and ultra low-power consumption of 0.19mW as compared to conventional results. These results reveal that the proposed PGA has ultra low-power consumption and very small gain error.
Author(s)
박승훈
Issued Date
2014
Awarded Date
2014. 2
Type
Dissertation
Publisher
부경대학교
URI
https://repository.pknu.ac.kr:8443/handle/2021.oak/1504
http://pknu.dcollection.net/jsp/common/DcLoOrgPer.jsp?sItemId=000001966913
Alternative Author(s)
Park, Seung Hun
Affiliation
대학원
Department
대학원 정보통신공학과
Advisor
류지열
Table Of Contents
목 차

Ⅰ. 서론 01

Ⅱ. PGA 기본개념 및 동작 원리 03
2.1 강판 결함 검출 시스템 03
2.2 제안된 PGA 회로 구조 04

Ⅲ. 제안된 PGA 회로 및 해석 07
3.1 능동부하 형태의 변형된 차동 증폭기 07
3.2 궤환 시스템 19
3.3 제안하는 PGA 회로 및 해석 23
3.4 레이아웃 27

Ⅳ. 시뮬레이션 결과 및 분석 29
4.1 주파수응답 시뮬레이션 30
4.2 시간응답 시뮬레이션 34
4.3 고조파 균형 시뮬레이션 36

Ⅴ. 결 론 40
참 고 문 헌 41
별첨 44
Degree
Master
Appears in Collections:
대학원 > 정보통신공학과
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