Development of High-Linearity CMOS RF Front-End Technology for Automotive Collision Avoidance Radar
- Alternative Title
- 높은 선형성을 가진 차량충돌 방지 레이더용 CMOS 고주파 전단부 개발
- Abstract
- In recent issues, an RFIC is being more popular due to stability, compactness, and small dimension. Especially, an RF circuit in the mm-wave band is convenient to design it from the spectrum regulations and technology availability. Transceiver design in CMOS technologies is always a matter of challenges to get higher performance. The demand of RF frontends increases which should be firmly incorporated with analog, digital, and mixed signal hardware. However, the reliability of the incorporated RF frontend receiver keeps on involving significant concern and impressive research.
In this thesis, we propose a new approach of design and performance analysis of an RF frontend receiver. It consists of a differential low noise amplifier (LNA) and, a down-conversion mixer for automotive collision avoidance radar application. The LNA and mixer is designed and implemented using 65nm RF CMOS technology with the supply voltage of 1.5V at 24GHz. The LNA is designed with cascode inductive source degeneration technique. The bias offset method is adopted in mixer design to boost its conversion gain and to reduce power consumption. This RF frontend receiver is improved by features with a trade-off between linearity and gain. The work is performed on Cadence Virtuoso design and simulation platform.
The proposed frontend showed very high third-order input intercept point (IIP3) of 4.3dBm to verify excellent linearity. The circuit also showed high conversion gain of 28.1dB, low noise figure of 3.66dB, and a very low power consumption of 6.03mW. This frontend showed a small die area of 0.80×1.2mm2 and 0.32×0.89mm2 with and without pads, and input and output return losses of -28.5dB and -28dB, respectively.
- Issued Date
- 2021
- Awarded Date
- 2021. 2
- Type
- Dissertation
- Keyword
- RF CMOS LNA Mixer Front-end-receiver
- Publisher
- 부경대학교
- Affiliation
- 부경대학교 대학원
- Department
- 대학원 정보통신공학과
- Advisor
- 류지열
- Table Of Contents
- CHAPTER 1 1
1. INTRODUCTION 1
1.1 Motivation 1
1.2 Short-Range Radar and Long-Range Radar 1
1.3 Proposed Front-End Receiver Architecture 4
1.4 Objective 5
1.5 Overview 7
CHAPTER 2 9
2. Overview and Design of Low Noise Amplifier 9
2.1 Background 9
2.2 S-parameters 11
2.3 Gain 15
2.4 Stability Factor 16
2.5 Noise 18
2.5.1 Noise Sources 19
2.5.2 Noise Figure 21
2.5.3 First Stage output noise 24
2.5.4 Sensitivity 27
2.6 Linearity 28
2.6.1 Compression Point 1-dB 29
2.6.2 Third-order Input Intercept Point (IIP3) 30
2.6.3 Consideratrion of System Level Linearity 33
2.7 Input Impedance Matching Network 34
2.8 Circuit Design and Analysis 35
2.8.1 Overview of 24GHz Radar 37
2.8.2 Design of the Proposed 24GHz CMOS LNA 38
2.8.3 Small Signal Analaysis 42
2.8.4 Implementation 51
2.9 Measurement Results and Discussions 53
2.9.1 Measurement of S-Parameter and Noise Figure 53
2.9.2 IIP3 and Stability Factor 57
2.10 Summary 62
CHAPTER 3 63
3. The Design of Low-Power Down-Conversion Mixer for 24 GHz Automotive Radar 63
3.1 Background 63
3.2 Linearity Methods 67
3.3 Important features of Mixers 73
3.3.1 Level in dBm 73
3.3.2 Conversion Gain (CG) 74
3.3.3 Noise Figure (NF) 74
3.3.4 Isolation 79
3.4 Topology of Active Transistor Mixers 80
3.4.1 Unbalanced Mixer 81
3.4.2 Single Balanced Mixer 83
3.4.3 Double-Balanced Mixer 86
3.5 Circuit Design and Analysis 88
3.5.1 Structure of 24GHz Radar 89
3.5.2 Design of 24GHz CMOS Mixer 89
3.6 Results and Discussions 97
3.6.1 Transient and Harmonics responses 97
3.6.2 Noise Figure 99
3.6.3 Order 3 interception point (IIP3) 100
3.7 Summary 104
CHAPTER 4 105
4. Design of Low Power and High Linearity CMOS RF Front-End Receiver in 65nm Technology for 24GHz Application 105
4.1 Background 105
4.2 Differential Cascode LNA Design Procedure 106
4.3 Double-balanced down-conversion Mixer 108
4.4 Analysis of the Proposed Front-End Receiver 111
4.5 The Proposed Front-End Receiver 112
4.6 Results and Discussions 123
4.6.1 Transient signal 123
4.6.2 Power consumption 124
4.6.3 Harmonic response 124
4.6.4 S-Parameter response 125
4.6.5 Noise Figure 126
4.7 Summary 131
CHAPTER 5 133
5. Conclusions and Future work 133
5.1 Conclusion 133
5.2 Future work 135
REFERENCES 137
[Appendix] Publication Paper List 148
- Degree
- Doctor
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