기준 주파수와 동일한 대역폭을 가진 Integer-N 방식의 빠른 록킹 위상고정루프 설계

Abstract

A novel fast locking integer-N phase locked loop (PLL) with an equivalent bandwidth to reference frequency is presented in this brief. When the PLL is out-lock, bandwidth becomes much wider than 1/10 of channel spacing with the wide bandwidth loop. When the PLL is near in-lock, bandwidth becomes narrower than 1/10 of channel spacing with the narrow bandwidth loop. The proposed PLL is designed based on a 0.35㎛ CMOS process with a 3.3V supply voltage. Simulation results show the fast lock time of 50μs for an 80㎒ frequency jump in a 200㎑ channel spacing PLL with almost 14 times wider bandwidth than the channel spacing.